1. Field of the Invention
The present invention relates to a semiconductor memory device, and more particularly to a semiconductor memory device suitable for a memory such as a dynamic RAM (Random Access Memory) formed into the LOC (Lead-On-Chip) structure and having a multiple-bit configuration.
2. Description of the Related Art
There is known a dynamic RAM adopting a package structure called the Lead-On-Chip (LOC) in which a semiconductor chip is packed in a package together with leads. The dynamic RAM having such a LOC structure is disclosed in, for example, JP-A-3-214669 and U.S. Pat. No. 5,068,712.
In the LOC structure, a lead pattern is affixed on a surface of a semiconductor chip through an insulating layer. In this structure, heretofore generally, bonding pads are arranged in a center of the chip in a line in the longitudinal direction of the chip as shown in JP-A-3-214669.
Further, in U.S. Pat. No. 5,068,712, bonding pads, that is, bonding pads for address data are arranged in two rows in a center of a chip.